MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 676

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Offset 0x0_50D4
Enhanced Local Bus Controller
13.3.1.16 Clock Ratio Register (LCRR)
The clock ratio register, shown in
provides configuration bits for extra delay cycles for address and control signals.
Reset
13-34
24–27
28–31
Bits
W
R
PBYP
1
0
BMTPS
Name
0
1
For proper operation of the system, it is required that this register setting
will not be altered while local bus memories or devices are being accessed.
Special care needs to be taken when running instructions from an eLBC
memory.
0 0
Reserved
Bus monitor timer prescale. Defines the multiplier, PS, to scale LBCR[BMT] for determining bus time-outs.
0000 PS = 8
0001 PS = 16
0010 PS = 32
0011 PS = 64
0100 PS = 128
0101 PS = 256
0110 PS = 512
0111 PS = 1024
1000 PS = 2048
1001 PS = 4096
1010 PS = 8192
1011 PS = 16,384
1100 PS = 32,768
1101 PS = 65,536
1110 PS = 131,072
1111 PS = 262,144
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
0
0
0
Table 13-22. LBCR Field Descriptions (continued)
0
Figure 13-20. Clock Ratio Register (LCRR)
0
Figure
0 0 0
13-20, sets the system clock to eLBC bus frequency ratio. It also
0
13 14 15 16
0
NOTE
EADC
0
0
Description
0
0
0
0
0
0
0
0
0
Freescale Semiconductor
0
26 27
0
Access: Read/Write
0
n
CLKDIV
n 0
31
0

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