MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 889

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.5.4.3.5
Figure 14-126
Table 14-136
14.5.4.3.6
Figure 14-127
Freescale Semiconductor
11–15
Offset 0x07
0–12
Reset
Bits
Bits
10
13
14
15
Offset 0x06
Reset
W
R
W
R
Page
Next
Duplex
Name
Name
Page
Able
Rx’d
0
Full
NP
0
describes the fields of the ANEX register.
describes the definition for the ANEX register.
describes the definition for the ANNPT register.
AN Expansion Register (ANEX)
AN Next Page Transmit Register (ANNPT)
Reserved, should be cleared.
Next page able. This bit is read-only and returns 1 on read. While read as set, indicates local device supports
next page function.
Page received. This bit is read-only. The bit clears on a read to the register.
0 Normal operation.
1 A new page was received and stored in the applicable AN link partner ability or AN next page register. This
bit latches high in order for software to detect while polling.
Reserved, should be cleared.
1
Full-duplex capability. This bit is read-only.
0 Link partner is not capable of full-duplex mode.
1 Link partner is capable of full-duplex mode.
Reserved, should be cleared.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Page
Msg
2
Figure 14-127. AN Next Page Transmit Register Definition
Table 14-135. ANLPBPA Field Descriptions (continued)
Figure 14-126. AN Expansion Register Definition
Ack2
3
Table 14-136. ANEX Field Descriptions
Toggle
4
5
All zeros
All zeros
Description
Description
Message/Un-formatted Code Field
Enhanced Three-Speed Ethernet Controllers
12
NP Able
13
Access: Read only
Page Rx’d
Access: Mixed
14
14-141
15
15

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