MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1597

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.3.1.5
The watchpoint monitor status register (WMSR) shown in
monitor.
Table 25-13
25.3.2
The following sections describes the trace buffer registers.
25.3.2.1
The trace buffer control registers (TBCR0, TBCR1), shown in
buffer events.
Freescale Semiconductor
Offset 0x01C
Reset
Offset 0x040
Reset
2–31
Bits
W
0
1
R
W
R
ACT TRIG
EN AMD TMD ECEN NECEN SIDEN TIDEN HALT
0
0
Name
TRIG
ACT
Trace Buffer Register Descriptions
1
describes the WMSR fields.
—
Watchpoint Monitor Status Register (WMSR)
Trace Buffer Control Registers (TBCR0, TBCR1)
1
2
2
Active
0 The start triggering event has not occurred; watchpoint monitor is not armed.
1 The start triggering event has occurred; watchpoint monitor is armed.
Triggered
0 The programmed event in WMCR0 has not yet been triggered.
1 The programmed event in WMCR0 has been triggered at least once.
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
3
Figure 25-7. Watchpoint Monitor Status Register (WMSR)
Figure 25-8. Trace Buffer Control Register 0 (TBCR0)
4
Table 25-13. WMSR Field Descriptions
5
6
7
All zeros
All zeros
8
—
Description
Figure 25-7
13 14 15 16
—
MODE
Figure 25-8
indicates the state of the watchpoint
—
Debug Features and Watchpoint Facility
20 21
and
STRT
Figure
23 24
25-9, specify trace
Access: Read/Write
Access: Read/Write
—
28 29
STOP
25-15
31
31