MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1600

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Debug Features and Watchpoint Facility
25.3.2.2
The trace buffer address register (TBAR) shown in
TBCR0[AMD] is zero). This address may be further qualified by the mask bits defined in
“Trace Buffer Address Mask Register (TBAMR).”
Table 25-16
25.3.2.3
The trace buffer address mask register (TBAMR) shown in
which allows excluding address bits from the comparison.
Table 25-17
25-18
Offset 0x04C
Reset
Offset 0x054
Reset
16–26
27–31
0–31
Bits
Bits
W
W
R
R
0
0
Name
TBAM Trace buffer address mask.A value of zero masks the address comparison for the corresponding address bit.
Name
TID
—
describes the TBAR field.
describes the TBAMR field.
Trace Buffer Address Register (TBAR)
Trace Buffer Address Mask Register (TBAMR)
0–31
Bits
These bits only mask the address bits generated by the hardware, but do not affect the bits specified in TBAR.
A bit that is masked from the comparison should be set to 0 in TBAR.
Reserved
Target ID. Specifies the target ID associated with TBCR0[TIDEN]. The target ID is defined in
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Name
TBA
Figure 25-11. Trace Buffer Address Mask Register (TBAMR)
Figure 25-10. Trace Buffer Address Register (TBAR)
Trace buffer address.
Table 25-17. TBAMR Field Descriptions
Table 25-15. TBCR1 Field Descriptions
Table 25-16. TBAR Field Descriptions
Figure 25-10
All zeros
All zeros
TBAM
TBA
Description
Description
Description
Figure 25-11
contains the address to match against (if
contains a mask for the TBAR,
Freescale Semiconductor
Section 25.3.2.3,
Access: Read/Write
Access: Read/Write
Table
25-26.
31
31