MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1685

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

T
U
Freescale Semiconductor
Tenure. The period of bus mastership. There can be separate address bus tenures and data
Throughput. The measure of the number of instructions that are processed per clock
Time-division multiplex (TDM). A single serial channel used by several channels taking
Transaction. A complete exchange between two bus devices. A transaction is typically
Transfer termination. Signal that refers to both signals that acknowledge the transfer of
Translation lookaside buffer (TLB). A cache that holds recently-used
User mode. The operating state of a processor used typically by application software. In
MPC83536E PowerQUICC™ III Integrated Processor Reference Manual, Rev. 1
bus tenures.
cycle.
turns.
comprised of an address tenure and one or more data tenures, which may overlap
or occur separately from the address tenure. A transaction may be minimally
comprised of an address tenure only.
individual beats (of both single-beat transfer and individual beats of a burst
transfer) and to signals that mark the end of the tenure.
user mode, software can access only certain control registers and can access only
user memory space. No privileged operations can be performed. Also referred to
as problem state.
page table
Glossary-9
entries.