MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 150

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Map
2-16
1
Block Base Address
Even though it is allocated 64 Kbytes in the memory space, only 8 Kbytes of internal bootrom is physically implemented, and
this is located at the upper 8 Kbytes of the allocated 64kbyte address space, from CCSR offset 0xF_E000 to 0xF_FFFF.
0x2_C000–
0x2_F000–
0xE_3200–
0x2_7000–
0x7_0000–
0x2_DFFF
0xD_FFFF
0xE_FFFF
0x3_AFFF
0x2_B000
0x2_E000
0xE_0000
0xE_1000
0xE_2000
0xE_3000
0xE_3100
0xF_0000
0x2_6000
0x3_1004
0x3_0000
0x4_0000
0x5_0000
0x6_0000
(Hex)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
eTSEC3
Reserved
USB controller 3
Reserved
Enhanced secure digital controller
Reserved
Integrated security engine
PIC—Global registers
PIC—Interrupt source configuration registers
PIC— Per-CPU registers
Reserved
Global Utilities
Performance Monitor
Watchpoint Monitor and Trace Buffer
SerDes1 (8-lane) control
SerDes2 (2-lane) control
Reserved
Internal Bootrom
Programmable Interrupt Controller (PIC) (0x4_0000–0x7_FFFF)
Table 2-11. CCSR Block Base Address Map (continued)
Device Specific Utilities (0xE_0000–0xF_FFFF)
1
Block
Section/Page
14.5/14-14
10.2/10-11
9.3.1/9-19
9.3.7/9-40
9.3.8/9-46
21.3/21-4
20.4/20-5
23.4/23-3
24.3/24-3
25.3/25-9
23.4/23-3
23.4/23-3
USB1 is at 0x2_2000;
USB2 is at 0x2_3000;
Freescale Semiconductor
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