MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 5

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
3.1
3.2
3.3
4.1
4.2
4.2.1
4.2.2
4.3
4.3.1
4.3.1.1
4.3.1.1.1
4.3.1.1.2
4.3.1.2
4.3.1.2.1
4.3.1.2.2
4.3.1.3
4.3.1.3.1
4.3.2
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.2
4.4.3
4.4.3.1
4.4.3.2
4.4.3.3
4.4.3.4
4.4.3.5
4.4.3.6
4.4.3.7
4.4.3.8
4.4.3.9
Freescale Semiconductor
Signals Overview ............................................................................................................. 3-1
Configuration Signals Sampled at Reset ....................................................................... 3-15
Output Signal States During Reset ................................................................................ 3-17
Overview.......................................................................................................................... 4-1
External Signal Descriptions ........................................................................................... 4-1
Memory Map/Register Definition ................................................................................... 4-3
Functional Description..................................................................................................... 4-8
System Control Signals................................................................................................ 4-2
Clock Signals ............................................................................................................... 4-3
Local Configuration Control........................................................................................ 4-4
Boot Sequencer ............................................................................................................ 4-8
Reset Operations .......................................................................................................... 4-8
Power-On Reset Sequence........................................................................................... 4-9
Power-On Reset Configuration.................................................................................. 4-11
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Accessing Configuration, Control, and Status Registers......................................... 4-4
Accessing Alternate Configuration Space ............................................................... 4-5
Boot Page Translation.............................................................................................. 4-7
Soft Reset................................................................................................................. 4-8
Hard Reset ............................................................................................................... 4-8
System PLL Ratio.................................................................................................. 4-11
e500 Core PLL Ratio ............................................................................................. 4-12
DDR PLL Ratio Configuration.............................................................................. 4-13
System Speed Configuration ................................................................................. 4-13
Core Speed Configuration ..................................................................................... 4-14
Boot ROM Location .............................................................................................. 4-14
Host/Agent Configuration ..................................................................................... 4-15
SerDes1 I/O Port Selection.................................................................................... 4-16
SerDes2 I/O Port Selection.................................................................................... 4-17
Updating CCSRBAR ........................................................................................... 4-4
Configuration, Control, and Status Registers Base Address
Alternate Configuration Base Address Register (ALTCBAR)............................ 4-6
Alternate Configuration Attribute Register (ALTCAR)...................................... 4-6
Boot Page Translation Register (BPTR).............................................................. 4-7
Register (CCSRBAR)...................................................................................... 4-5
Reset, Clocking, and Initialization
Signal Descriptions
Contents
Chapter 3
Chapter 4
Title
Number
Page
v

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