MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 579

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

should not be read or written to while the PKEU is processing as this causes a ‘data modify during
processing error.’ This register is cleared when the PKEU is reset. The maximum size acceptable is 4096
bits.
10.7.7.4
The PKEU Data Size Register,
modulus or irreducible polynomial. The minimum size valid for all routines to operate properly is 33 bits.
The maximum size to operate properly is 4096 bits. A value in bits larger than 4096 results in a data size
error (see the DSE bit in
10.7.7.5
This register,
Table 10-68
Freescale Semiconductor
Offset 0x3_C040
Reset
Offset 0x3_C010
Reset
W
W
R
R
0–60
Bits
Reset
0
0
61
Field
Addr
R/W
describes the PKEU reset control register’s fields.
PKEU Data Size Register
PKEU Reset Control Register
0
Figure
Name
—
RI
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
10-98, contains three reset options specific to the PKEU.
Table 10-68. PKEU Reset Control Register Field Descriptions
Table
Reserved
Reset interrupt. Writing this bit active high causes PKEU interrupts signaling done and
error to be reset. It further resets the state of the PKEU interrupt status register.
0 Do not reset
1 Reset interrupt logic
10-70).
Figure
Figure 10-98. PKEU Reset Control Register
Figure 10-97. PKEU Data Size Register
Figure 10-96. PKEU AB Size Register
10-97, specifies the size (in bits) of the significant portion of the
—
—
—
PKEU 0x3_C018
All zeros
All zeros
R/W
0
Description
60
Security Engine (SEC) 3.0
51 52
51 52
RI
61
Access: Read/Write
Access: Read/Write
MI
62
Data Size
AB Size
SR
63
10-149
63
63