MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 891

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5.4.3.8
Figure 14-129
Table 14-139
Freescale Semiconductor
Offset 0x0F
Reset
5–15
Bits
W
R 1000X Full 1000X Half 1000T Full 1000T Half
4–15
3
4
Bits
0
1
2
3
Un-formatted
Code Field
1
0
Message/
Toggle
Name
1000X Half
1000T Half
1000X Full
1000T Full
Ack2
describes the fields of the EXST register.
describes the definition for the EXST register.
Extended Status Register (EXST)
Name
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
0
1
Acknowledge 2. Indicates the link partner’s ability to comply with the message.
0 Link partner cannot comply with message.
1 Link partner complies with message.
Toggle. Used to ensure synchronization with the link partner during next page exchange. This bit
always takes the opposite value of the toggle bit of the previously-exchanged link code word. The
initial value in the first next page transmitted is the inverse of bit 11 in the base link code word.
This bit is read-only.
0 Toggle bit of the previously-exchanged link code word was 1.
1 Toggle bit of the previously-exchanged link code word was 0.
Message pages are formatted pages that carry a pre-defined message code, which is
enumerated in IEEE 802.3u/Annex 28C. Unformatted code fields take on an arbitrary value.
1000X full-duplex capability. Returns 1 on read. This bit is read-only.
0 PHY cannot operation in 1000BASE-X full-duplex mode.
1 PHY can operate in 1000BASE-X full-duplex mode.
1000X half-duplex capability. Returns 0 on read. This bit is read-only.
0 PHY cannot operation in 1000BASE-X half-duplex mode.
1 PHY can operate in 1000BASE-X half-duplex mode.
1000T full-duplex capability. Returns 1 on read. This bit is read-only.
0 PHY cannot operation in 1000BASE-T full-duplex mode.
1 PHY can operate in 1000BASE-T full-duplex mode.
1000T half-duplex capability. Returns 0 on read. This bit is read-only.
0 PHY cannot operation in 1000BASE-T half-duplex mode.
1 PHY can operate in 1000BASE-T half-duplex mode.
Reserved
Table 14-138. ANLPANP Field Descriptions (continued)
Figure 14-129. Extended Status Register Definition
1
2
Table 14-139. EXST Field Descriptions
0
3
4
0
0
Description
Description
0
0
0
Enhanced Three-Speed Ethernet Controllers
0
—
0
0
0
Access: Read only
0
0
14-143
15
0