MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 146

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Memory Map
2.3.4
Figure 2-6
Figure 2-6
individual functional block. The first 3 Kbytes are available for general registers. The next 512 bytes are
dedicated to address translation and mapping registers, if applicable to that particular functional unit (for
example, PCI). If a unit has error management registers, they are typically placed starting at offset 0xE00
from the beginning of the block’s 4-Kbyte space, and any debug registers are typically placed in the final
256 bytes of the unit’s register space starting at offset 0xF00.
2-12
0xF FFFF
0x0 0000
0x4 0000
0x8 0000
0xE 0000
CCSR Memory Block
provides an overview of the general utilities registers.
also shows the organization of registers inside the 4-Kbyte register space allocated to an
General Utilities Registers
Device-Specific
Figure 2-6. General Utilities Registers Mapping to Configuration, Control,
Reserved
General
Utilities
Utilities
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PIC
General Utilities Registers Memory Block
and Status Memory Block
0x0 0000
0x0 1000
0x0 2000
0x0 3000
0x0 4000
0x0 5000
0x0 6000
0x0 7000
0x0 8000
0x0 9000
0x0 A000 PCI Express 1
0x0 B000
0x0 C000
0x1 8000
0x1 9000
0x2 0000
0x2 1000
0x2 2000
0x2 3000
0x2 4000
0x2 5000
0x2 6000
0x2 7000
0x2 B000
0x2 C000
0x2 E000
0x2 F000
0x3 0000
0x3 FFFF
PCI Express 2
PCI Express 3
Local Access
L2 Cache
Local Bus
eTSEC 1
eTSEC 3
eSDHC
DUART
USB3
SATA1
SATA2
Memory
DMA
USB1
USB2
SEC
ECM
PCI
SPI
I
2
C
0xn nC00
0xn nE00
0xn n000
0xn nF00
General Utility Block
Freescale Semiconductor
Error Mgmt
Registers
General
Debug
ATMU