MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 700

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Local Bus Controller
bus cycle to be effective. Note that because LGTA is synchronized, bus termination occurs two cycles after
LGTA assertion, so in case of read cycle, the device still must drive data as long as LOE is asserted.
The user selects whether transfer acknowledge is generated internally or externally (LGTA) by
programming ORn[SETA]. Asserting LGTA always terminates an access, even if ORn[SETA] = 0
(internal transfer acknowledge generation), but it is the only means by which an access can be terminated
if ORn[SETA] = 1. The timing of LGTA is illustrated by the example in
13.4.2.5
Boot chip-select operation allows address decoding for a boot ROM before system initialization. LCS0 is
the boot chip-select output; its operation differs from other external chip-select outputs after a system reset.
When the core begins accessing memory after system reset, LCS0 is asserted for every local bus access
until BR0 or OR0 is reconfigured.
The boot chip-select also provides a programmable port size, which is configured during reset. The boot
chip-select does not provide write protection. LCS0 operates this way until the first write to OR0 and it
can be used as any other chip-select register after the preferred address range is loaded into BR0. After the
first write to OR0, the boot chip-select can be restarted only with a hardware reset.
the initial values of the boot bank in the memory controller.
13-58
LBCTL
LCLK
LCS n
LALE
LGTA
LOE
LAD
GPCM Boot Chip-Select Operation
TA
A
Address
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 13-45. External Termination of GPCM Access
Latched Address
Read Data
Figure
13-45.
Table 13-34
Freescale Semiconductor
describes