MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1674

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MPC8535E
C.3.2
MPC8535E host/agent configuration options differ slightly from those of the MPC8536E (as described in
Section 4.4.3.7, “Host/Agent
C.3.3
Because the MPC8535E has fewer PCI Express and SATA interfaces and does not support SGMII, I/O port
selection, as described in
Port
C.3.3.1
Table C-4
possible for the
C-4
Functional Signals
LWE[1:3]/LBS[1:3]
Default (111)
TSEC3_TXD[6:4]
Selection,” differs between the two devices. This section describes these differences.
Default (111)
Functional
Signal
shows the configuration of I/O ports and bit rates (and required reference clocks) that are
Host/Agent Configuration
I/O Port Selection
SerDes1 (PCI Express) I/O Port Selection
SerDes1
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reset Configuration Name
Reset Configuration
cfg_host_agt[0:2]
cfg_io_ports[0:2]
Section 4.4.3.8, “SerDes1 I/O Port Selection
interfaces.
Name
Table C-4. SerDes1 I/O Port Selection (MPC8535E)
Table C-3. Host/Agent Configuration (MPC8535E)
Configuration”). The MPC8535E options are shown in
(Binary)
Value
000
001
010
011
100
101
110
111
(Binary)
Value
000
001
010
011
100
101
110
111
Reserved
MPC8536E acts as an endpoint on PCI Express 3 interface. It acts as
the host/root complex for the PCI and PCI Express 2 interfaces.
Reserved
MPC8536E acts as an endpoint on PCI Express 2 interface. It acts as
the host/root complex for the PCI and PCI Express 3 interfaces.
Reserved
Reserved
MPC8536E acts as an agent of an external host on its PCI interface.
It acts as a root complex for both PCI Express interfaces.
MPC8536E acts as the host processor/root complex on all interfaces
(default).
Reserved
Both PCI Express ports powered down
Reserved
Reserved
Reserved
PCI Express 2 (x4) (2.5 Gbps)
Reserved
PCI Express 2 (x2) (2.5 Gbps)
PCI Express 3 (x2) (2.5 Gbps)
and
Meaning
Meaning
Section 4.4.3.9, “SerDes2 I/O
SerDes1 Lanes E–H
SerDes1 Lanes E–F
SerDes1 Lanes G–H
Freescale Semiconductor
Table
C-3.