MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 837

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
14.5.3.6.3
Figure 14-57
Table 14-61
14.5.3.6.4
Figure 14-58
Table 14-62
Freescale Semiconductor
10–31 TR255 Transmit and receive 128- to 255-byte frame counter—Increments for each good or bad frame transmitted and
Bits
10–31 TR511 Increments for each good or bad frame transmitted and received which is 256–511 bytes in length, inclusive
0–9
Offset eTSEC1:0x2_468C;
Reset
Bits
0–9
Offset eTSEC1:0x2_4688;
Reset
W
R
W
R
eTSEC3:0x2_668C
Name
0
Name
eTSEC3:0x2_6688
0
describes the fields of the TR255 register.
describes the fields of the TR511 register.
Figure 14-57. Transmit and Received 128- to 255-Byte Frame Register Definition
Figure 14-58. Transmit and Received 256- to 511-Byte Frame Register Definition
describes the definition for the TR255 register.
describes the definition for the TR511 register.
Reserved
received which is 128–255 bytes in length, inclusive (excluding preamble and SFD but including FCS bytes).
Transmit and Receive 128- to 255-Byte Frame Counter (TR255)
Transmit and Receive 256- to 511-Byte Frame Counter (TR511)
Reserved
(excluding preamble and SFD but including FCS bytes).
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 14-61. TR255 Field Descriptions
Table 14-62. TR511 Field Descriptions
9
9
10
10
All zeros
All zeros
Description
Description
TR511
TR255
Enhanced Three-Speed Ethernet Controllers
Access: Read/Write
Access: Read/Write
14-89
31
31

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