MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 661

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
13.3.1.2.4
Figure 13-5
Freescale Semiconductor
Offset OR0: 0x0_5004
Reset
Reset
Refer to
Bits
30
31
W
W
R
R
OR1: 0x0_500c
OR2: 0x0_5014
OR3: 0x0_501c
OR4: 0x0_5024
OR5: 0x0_502c
OR6: 0x0_5034
OR7: 0x0_503c
AM
16
0
Table 13-5
Name
EHTR
—
shows the bit fields for ORn when the corresponding BRn[MSEL] selects a UPM machine.
17
Option Registers (OR n )—UPM Mode
—
Extended hold time on read accesses. Indicates with TRLX how many cycles are inserted between a read
access from the current bank and the next access.
Reserved
for the OR0 reset value. All other option registers have all bits cleared.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
18
TRLX
0
0
1
1
BCTLD
Table 13-8. OR n
19
Figure 13-5. Option Registers (OR n ) in UPM Mode
EHTR
0
1
0
1
20
1 idle clock cycle is inserted.
2 idle clock cycles are inserted.
4 idle clock cycles are inserted.
8 idle clock cycles are inserted.
—
—
FCM Field Descriptions (continued)
22
23
BI
All zeros
All zeros
AM
Description
24
1
Meaning
—
28
Enhanced Local Bus Controller
TRLX
29
Access: Read/Write
EHTR
30
EAD
13-19
15
31