MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1257

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
19.3.4.9
CommandStatus, shown in
Table 19-25
Freescale Semiconductor
Offset 0x1_8160
Reset
Reset
31–24
23–20
19–16
15–12
3–1
Bit
11–8
0
Bit
W
W
R
R
31
15
RecPMPLocal
LPB_EN
describes the CommandStatus fields.
RecPMPLocal
DMATPMPNo
DMATCmdNo
Name
Link Layer Command Status Register (CommandStatus)
CSState
Name
Figure 19-25. Link Layer Command Status Register (CommandStatus)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Loopback enable. These bits control both loopback modes and power management modes.
000 No loopback and in normal power mode
001 Far end re-timed (parallel) loopback enabled
010 Near end analog (serial) loopback enabled
011 Invalid
100 Invalid
101 goPartial. This encoding results in the OOB state machine entering the partial state. Note that
110 goSlumber. This encoding results in the OOB state machine entering the slumber state. Note
111Invalid
Note: This field is available only for SATA1.
Reserved
Table 19-24. PhyCtrlCfg1 Field Descriptions (continued)
12
Figure
in the PCS, partial and slumber have the same effect.
that in the PCS, partial and slumber have the same effect.
Reserved
CSSIdle = 0x0
CSSGP = 0x1
CSSPCA = 0x2
Table 19-25. CommandStatus Field Descriptions
11
19-25, indicates the status of the command layer.
CSState
24
All zeros
All zeros
8
CSSNPS = 0x4
CSSSC = 0x5
CSSNCS = 0x6
23
Description
7
Description
DMATCmdNo
20
CMState
CSSPF = 0x7
CSSTO = 0x8
CSSWCI = 0x9
19
DMATPMPNo
Access: Read only
SATA Controller
19-27
16
0

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