MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 323

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Offset 0xB28
Reset
Reset
Table 8-33
Freescale Semiconductor
W
W
R
R
12–13
16–19
20–23
24–27
28–31
Bits
2–5
6–9
10
11
14
15
DHC_EN DSO_MDIC_EN DSO_MDICPZ DSO_MDICNZ
0
1
16
0
DSO_MDIC_NZ_OE Driver software override n-impedance output enable
DSO_MDIC_PZ_OE Driver software override p-impedance output enable
describes the DDRCDR_1 fields.
DSO_MDIC_EN
DSO_MDICNZ
DSO_MDICPZ
DSO_CPZ
DSO_C_EN
DSO_D_EN
DSO_CNZ
DSO_DNZ
DSO_CPZ
DSO_DPZ
DHC_EN
Name
ODT
1
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 8-28. DDR Control Driver Register 1 (DDRCDR_1)
2
DDR driver hardware compensation enable
Driver software override enable for MDIC
DDR driver software MDIC p-impedance override
DDR driver software MDIC n-impedance override
ODT termination value for IOs. This field is combined with DDRCDR_2[ODT] to determine
the termination value. Below is the termination based on concatenating these two fields.
000
001
010
011
100
101
110
111
Note that the order of concatenation is (from left to right)
Driver software override enable for address/command
Driver software override enable for data
DDR driver software command p-impedance override
DDR driver software command n-impedance override
Driver software data p-impedance override
Driver software data n-impedance override
19 20
Table 8-33. DDRCDR_1 Field Descriptions
DSO_CNZ
75
55
60
50
150
43
120
Reserved
DDRCDR_1[ODT], DDRCDR_2[ODT]
5
6
23 24
9
DSO_MDIC_PZ_OE DSO_MDIC_NZ_OE
All zeros
All zeros
DSO_DPZ
10
Description
11
27
12
28
ODT
13
DDR Memory Controller
DSO_C_EN DSO_D_EN
DSO_DNZ
Access: Read/Write
14
15
31
8-49