MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 382

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Programmable Interrupt Controller (PIC)
9-12
0x21F4–
0x2304–
0x2434–
0x2514–
0x21C0
0x21D0
0xFFFF
0x21A0
0x21B0
0x21E0
0x21F0
0x22FF
0x23FF
0x24FF
0x2160
0x2170
0x2180
0x2190
0x2300
0x2400
0x2410
0x2420
0x2430
0x2500
0x2510
0x0000
0x0010
0x0020
0x0030
0x0040
0x0050
0x0060
Offset
GTVPRB1—Global timer vector/priority register group B 1
GTDRB1—Global timer destination register group B 1
GTCCRB2—Global timer current count register group B 2
GTBCRB2—Global timer base count register group B 2
GTVPRB2—Global timer vector/priority register group B 2
GTDRB2—Global timer destination register group B 2
GTCCRB3—Global timer current count register group B 3
GTBCRB3—Global timer base count register group B 3
GTVPRB3—Global timer vector/priority register group B 3
GTDRB3—Global timer destination register group B 3
Reserved
TCRB—Timer control register (Group B)
Reserved
MSGR4—Message register 4
MSGR5—Message register 5
MSGR6—Message register 6
MSGR7—Message register 7
Reserved
MER—Message enable register (for MSGR4–7)
MSR—Message status register (for MSGG4–7)
Reserved
EIVPR0—External interrupt 0 (IRQ0) vector/priority register
or PEX1-INTA vector/priority register
EIDR0—External interrupt 0 (IRQ0) destination register
or PEX1-INTA destination register
EIVPR1—External interrupt 1 (IRQ1) vector/priority register
or PEX1-INTB vector/priority register
EIDR1—External interrupt 1 (IRQ1) destination register
or PEX1-INTB destination register
EIVPR2—External interrupt 2 (IRQ2) vector/priority register
or PEX1-INTC vector/priority register
EIDR2—External interrupt 2 (IRQ2) destination register
or PEX1-INTC destination register
EIVPR3—External interrupt 3 (IRQ3) vector/priority register
or PEX1-INTD vector/priority register
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Interrupt Source Configuration Registers—Block Base Address: 0x5_0000
Table 9-4. PIC Register Address Map (continued)
Register
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
—
R
R
0x8000_0000
0x0000_0001
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x8000_0000
0x8000_0000
0x0000_0001
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8000_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x8000_0000
0x0000_0001
0x8000_0000
Reset
Freescale Semiconductor
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Section/Page
9.3.2.4/9-25
9.3.2.5/9-26
9.3.2.2/9-24
9.3.2.3/9-25
9.3.2.4/9-25
9.3.2.5/9-26
9.3.2.2/9-24
9.3.2.3/9-25
9.3.2.4/9-25
9.3.2.5/9-26
9.3.2.6/9-27
9.3.5.1/9-35
9.3.5.2/9-35
9.3.5.3/9-36
9.3.7.1/9-41
9.3.7.2/9-42
9.3.7.1/9-41
9.3.7.2/9-42
9.3.7.1/9-41
9.3.7.2/9-42
9.3.7.1/9-41
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