MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 37

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
17.3.9.14
17.3.9.15
17.3.9.16
17.3.9.17
17.3.9.18
17.3.9.19
17.3.9.20
17.3.9.21
17.3.9.22
17.3.10
17.3.10.1
17.3.10.2
17.3.10.3
17.3.10.4
17.3.10.5
17.3.10.6
17.3.10.7
17.3.10.8
17.3.10.9
17.3.10.10
17.3.10.11
17.3.10.12
17.3.10.13
17.3.10.14
17.3.10.15
17.3.10.16
17.3.10.17
17.3.10.18
17.3.10.19
17.3.10.20
17.4
17.4.1
17.4.1.1
17.4.1.2
17.4.1.2.1
17.4.1.3
17.4.1.4
17.4.1.5
17.4.1.6
Freescale Semiconductor
Functional Description................................................................................................. 17-97
PCI Express Extended Configuration Space ........................................................... 17-82
Architecture ............................................................................................................. 17-98
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
PCI Express Slot Control Register—0x64 .......................................................... 17-77
PCI Express Slot Status Register—0x66 ............................................................. 17-77
PCI Express Root Control Register (RC Mode Only)—0x68............................. 17-78
PCI Express Root Status Register (RC Mode Only)—0x6C............................... 17-78
PCI Express MSI Message Control Register (EP Mode Only)—0x72 .............. 17-80
PCI Express MSI Message Address Register (EP Mode Only)—0x74 ............. 17-80
PCI Express MSI Message Upper Address Register
PCI Express MSI Message Data Register (EP Mode Only)—0x7C .................. 17-81
PCI Express Advanced Error Reporting Capability ID Register—0x100........... 17-83
PCI Express Uncorrectable Error Status Register—0x104 ................................. 17-83
PCI Express Uncorrectable Error Mask Register—0x108 .................................. 17-84
PCI Express Uncorrectable Error Severity Register—0x10C ............................. 17-85
PCI Express Correctable Error Status Register—0x110 ..................................... 17-86
PCI Express Correctable Error Mask Register—0x114 ...................................... 17-86
PCI Express Advanced Error Capabilities and Control Register—0x118 .......... 17-87
PCI Express Header Log Register—0x11C–0x12B ............................................ 17-88
PCI Express Root Error Command Register—0x12C......................................... 17-89
PCI Express Root Error Status Register—0x130 ................................................ 17-89
PCI Express Correctable Error Source ID Register—0x134............................... 17-90
PCI Express Error Source ID Register—0x136 .................................................. 17-90
LTSSM State Status Register—0x404................................................................. 17-91
PCI Express Controller Core Clock Ratio Register—0x440............................... 17-92
PCI Express Power Management Timer Register—0x450 ................................. 17-93
PCI Express PME Time-Out Register (EP-Mode Only)—0x454 ....................... 17-94
PCI Express Subsystem Vendor ID Update Register (EP Mode Only)—0x478. 17-95
Configuration Ready Register—0x4B0............................................................... 17-95
PME_To_Ack Timeout Register (RC-Mode Only)—0x590............................... 17-96
Secondary Status Interrupt Mask Register (RC-Mode Only)—0x5A0 ............... 17-96
PCI Express Transactions .................................................................................... 17-99
Byte Ordering ...................................................................................................... 17-99
Lane Reversal .................................................................................................... 17-101
Transaction Ordering Rules ............................................................................... 17-102
Memory Space Addressing................................................................................ 17-102
I/O Space Addressing ........................................................................................ 17-102
PCI Express MSI Message Capability ID Register
(EP Mode Only)—0x70 .................................................................................. 17-79
(EP Mode Only)—0x78 .................................................................................. 17-81
Byte Order for Configuration Transactions ................................................... 17-101
Contents
Title
Number
Page
xxxvii

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