MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1501

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
23.4.1.4
Shown in
Section 4.4.3.14, “eTSEC1 width,” Section 4.4.3.15, “eTSEC3 Width, Section 4.4.3.21, “PCI Arbiter
Configuration.”
Table 23-7
Freescale Semiconductor
Bits
Offset 0x00C
Reset
Reset
0
1
W
W
R
R PCI_S
ECW1 ECW2
PD
16
n
n
0
Figure
describes the bit settings of PORDEVSR.
ECW1
ECW2
Name
POR Device Status Register (PORDEVSR)
SYS_
SPD
17
n
n
1
23-4, PORDEVSR reports other POR settings for I/O devices as described in
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
CORE_
SPD
SRDS2_IO_SEL
eTSEC1 controller width (See
0 eTSEC1 interface operates in reduced pin mode, either RTBI, RGMII, RMII
1 eTSEC1 interface operates in standard width TBI, GMII, MII
Note: eTSEC1 is always in 8-bit FIFO protocol regardingless to this field.
eTSEC3 controller width (See
0 eTSEC3 interface operates in reduced pin mode, either RTBI, RGMII or RMII mode
1 eTSEC3 interface operates in standard width MII mode
Note: eTSEC3 is always in 8-bit FIFO protocol regardingless to this field.
18
2
n
n
Figure 23-4. POR Device Status Register (PORDEVSR)
19
n
0
Table 23-7. PORDEVSR Field Descriptions
20
n
n
4
ECP3
21
5
0
n
22
Section 4.4.3.14, “eTSEC1
Section 4.4.3.15, “eTSEC3
n
0
6
ECP1
n
0
7
Description
24
8
0
0
RTYPE
25
0
n
9
width.”)
Width.”)
10
26
n
0
IO_SEL
n
0
12
n
0
Access: Read only
13
0
0
PCI_
ARB
Global Utilities
14
n
0
15
31
0
0
23-9

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