MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 165

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB1_PWRFAULT USB1 power fault
USB2_PWRFAULT USB2 power fault
3.2
The signals that serve alternate functions as configuration input signals during system reset are
summarized in
Chapter 4, “Reset, Clocking, and Initialization.”
Note that throughout this document, the reset configuration signals are described as being sampled at the
negation of HRESET. However, there is a setup and hold time for these signals relative to the rising edge
of HRESET, as described in the MPC8536E Integrated Processor Hardware Specifications. Note that the
PLL configuration signals have different setup and hold time requirements than the other reset
configuration signals.
The reset configuration signals are multiplexed with other functional signals. The values on these signals
during reset are interpreted to be logic one or zero, regardless of whether the functional signal name is
defined as active-low. Most of the reset configuration signals have internal pull-up resistors so that if the
signals are not driven, the default value is high (a one), as shown in the table. Some signals do not have
Freescale Semiconductor
USB1_PCTL0
USB1_PCTL1
USB2_PCTL0
USB2_PCTL1
USB1_D[7:0]
USB2_D[7:0]
USB3_D[7:0]
USB1_CLK
USB1_NXT
USB1_STP
USB2_CLK
USB2_NXT
USB2_STP
USB3_CLK
USB3_NXT
USB3_STP
USB1_DIR
USB2_DIR
USB3_DIR
Name
UDE
Configuration Signals Sampled at Reset
Table
Unconditional debug event
USB1 clock
USB1 data
USB1 data
USB1 next data
USB1 port control 0
USB1 port control 1
USB1 stop
USB2 clock
USB2 data
USB2 data
USB2 next data
USB2 port control 0
USB2 port control 1
USB2 stop
USB3 clock
USB3 data
USB3 data
USB3 next data
USB3 stop
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 3-2. MPC8536E Alphabetical Signal Reference (continued)
3-3. The detailed interpretation of their voltage levels during reset is described in
Description
Functional
Block
USB1
USB1
USB1
USB1
USB1
USB1
USB1
USB1
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB2
USB3
USB3
USB3
USB3
USB3
PIC
Alternate Function(s)
cfg_pci_speed
cfg_pci_clk
GPIO6
GPIO7
GPIO8
GPIO9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Signals
No. of
1
1
8
1
1
1
1
1
1
1
8
1
1
1
1
1
1
1
8
1
1
1
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
Signal Descriptions
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
21-1/21-3
9-3/9-8
Table/
Page
3-15