MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1057

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16-24
16.3.2.2
The PCI device ID register, shown in
16.3.2.3
The 2-byte PCI bus command register provides control over the ability to generate and respond to PCI
cycles.
Freescale Semiconductor
Offset 0x04
Reset 0 0 0 0 0 0
Offset 0x02
Reset
W
R
15–10
Bits
W
R
PCI:
15
9
Table 16-26
15–0
15–0
15
Bits
Bits
back-to-back
describes PCI vendor ID register fields.
PCI Device ID Register—Offset 0
PCI Bus Command Register—Offset 0
—
*0 = Agent, 1 = Host
Name
Fast
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
describes the bits of the PCI bus command register.
10
Vendor ID
Device ID
Table 16-26. PCI Bus Command Register Field Descriptions
Reserved
Hard-wired to 0, indicating that this PCI controller (as a master) does not run fast back-to-back
transactions.
back-to-back SERR — Parity error
Name
Name
Table 16-24. PCI Vendor ID Register Field Description
Table 16-25. PCI Device ID Register Field Description
Fast
0
9
Figure 16-27. PCI Bus Command Register
Figure 16-26. PCI Device ID Register
0
8
0x1957 (Freescale)
0x0050
Note: 0x0051MPC8536
Figure
Device-specific; see field description
0
7
16-26, is used to identify the device.
response
MPC8536E
0
6
Device ID
x
—
0
5
02
Description
Memory-write-
and-invalidate
Description
Description
x
04
0
4
Special
cycles Bus master Memory
0
3
2
*
Access: Read only
space
PCI Bus Interface
0
1
Access: Mixed
I/O space
0
0
16-31
0