MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 515

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The context registers may be described as follows:
Freescale Semiconductor
•
* Must be written at the start of a new message, except if zero
C
T
-- don’t care
length of total data (in bits)
length of data processed with current descriptor (in bits)
Register
Context
Registers 1–2 contain the intermediate MAC value. This needs to be provided only when switching
context during additional authenticated data (AAD) and/or text data processing (AAD+text data
stream split into multiple descriptors).
On the output side, these registers contain either the intermediate MAC tag in case of context
switching (requires AUX2=0) or the final MAC tag at the end of processing (if AUX2=1). If
AUX2=0 on the last descriptor processing a particular message, then these registers contain the
10
11
12
1
2
3
4
5
6
7
8
9
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
AUX1 = 0
—
—
data segment, or
Mode Register (ECM = 10, AUX0 = 10, CM = 01, ED = 1)
last AAD or text
Table 10-36. GCM-GHASH Context
len(text data)
AUX1 Value
(Computed)
len(AAD)
len(AAD)
MAC only
Inputs
MAC
—
—
H
—
GCM-GHASH (Only GHASH Computed)
*
T*
C
AUX1 = 1
T*
last IV segment
len(IV)
—
T
AUX2 = 0
—
AUX2 Value
Outputs
—
—
—
—
—
—
—
Security Engine (SEC) 3.0
(Computed)
AUX2 = 1
MAC
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