MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 198

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset, Clocking, and Initialization
After the device has completed the reset sequence, if the ROM location selects the on-chip ROM eSDHC
Boot configuration, the e500 core starts to execute code from the internal on-chip ROM. The e500 core
configures the eSDHC controller, enabling it to communicate with the external SD/MMC card. The
SD/MMC card should contain a specific data structure with control words, device configuration
information and initialization code. The on-chip ROM boot code uses the information from the SD/MMC
card content to configure the device, and to copy the initialization code to a target memory device (for
example, the DDR) through the eSDHC interface. After all the code has been copied, the e500 core starts
to execute the code from the target memory device.
There are several different ways a user may utilise the eSDHC boot feature. The simplest is for the on-chip
ROM to copy an entire operating system boot image into system memory, and then jump to it to begin
execution. However, this may be many megabytes and in some situations may be sub-optimal, since only
1-bit mode is used during booting.
A more advanced option is for the on-chip ROM to only copy a small user-customised subroutine, which
configures the eSDHC in an optimal way. The user-customised subroutine then copies the rest of the boot
code potentially much faster than the on-chip ROM software can achieve. For example, the
user-customised subroutine may utilise 4-bit or 8-bit eSDHC interfaces, or support new SD or MMC
format revisions, or increase the external clock frequency based on knowledge of the exact frequency that
the MPC8536E is operating at.
4.5.1.1.2
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Provides mechanism to load initialization code from the following external devices:
— SD memory cards, including the memory portion of SD Combo cards (up to and including
— MMC, RS-MMC and MMCplus (up to and including version 4.0)
— SDHC cards (SD High Capacity, from 4GByte to 32GByte)
Boot from the following devices is not supported
— SDIO and miniSDIO cards which are not SD Combo cards and consequently have no memory
— Locked (password-protected) SD/MMC cards
— Secured Mode of SD cards (SD Card Specification Part 3: Security Specification)
Simple data structure in SD/MMC card
BOOT signature will be checked to validate that the SD/MMC card contains valid code
Supports variable code length in SD/MMC card
Flexible target memory device
Supports target memory configuration controlled by the user
Only 1-bit operation is supported for boot (even if the SD/MMC card supports 4 or 8-bit parallel
access).
Initial setting will use a serial clock below 400 kHz; the SD/MMC internal registers are read by
initialization code and parsed to determine the optimal clock frequency supported by the SD/MMC
card inserted.
High speed cards are supported (up to 50MHz SD and 52MHz MMC).
version 2.0)
Features
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Freescale Semiconductor