MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1552

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Global Utilities
23.5.1.16 Low Power Considerations
The following should be considered in the low power system implementation.
23.5.1.16.1 POWER_OK Input Signal
POWER_OK is an external input indication that VDD which was switched off in MPC8356E sleep mode
has returned to specified levels after a wakeup event occurs. If an external power switch device is used
(not a FET), it will typically provide such a signal. When a wakeup event occurs and PMC asserts the
POWER_EN signal to turn on power, it will wait until the POWER_OK signal is asserted before it will
proceed to enable the e500 PLL and to wait for the e500 PLL to lock. If there is no external source of
POWER_OK, i.e. an external FET is used to switch power and there’s no way to indicate that power is
stable, then the customer will tie POWER_OK to logic 1’b1 on the board. In this case POWER_OK will
always be asserted to the PMC and the user will need to set the voltage ramp counter VRCNT in the
PMRCCR register to ensure there is enough time for power to become stable before enabling the e500
PLL. If the e500 PLL is enabled before the power is stable it might become unpredictable and might not
23-60
5/12V
REG.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 23-36. Power Supply Switch for MPC8536E
Always On
VDD
3.3v-on
0v-off
power_en
PLAT_VDD/AVDD
CORE_VDD/AVDD
8536E
PMC
Freescale Semiconductor

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