MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 278

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DDR Memory Controller
Table 8-1
specification has a pinout diagram showing pin numbers. It also lists all electrical and mechanical
specifications.
8-4
MAPAR_ERR
MAPAR_OUT
MSRCID[0:4]
MDQS[0:8]
MDQS[0:8]
MECC[0:7]
MODT[0:3]
MDQ[0:63]
MCKE[0:3]
MDIC[0:1]
MDM[0:8]
MCS[0:3]
MCK[0:5]
MCK[0:5]
MA[15:0]
MBA[2:0]
MDVAL
MCAS
MRAS
Name
MWE
shows how DDR memory controller external signals are grouped. The device hardware
Address parity error
Address parity out
Data bus
Data strobes
Complement data strobes
Error checking and correcting
Column address strobe
Address bus
Logical bank address
Chip selects
Write enable
Row address strobe
Data mask
DRAM clock outputs
DRAM clock outputs (complement)
DRAM clock enable
DRAM on-die termination external control.
Memory debug data valid
Memory debug source ID
Driver impedance calibration
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 8-1. DDR Memory Interface Signal Summary
Function/Description
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All zeros
All ones
All ones
Reset
Zero
Zero
One
One
One
One
b10
Freescale Semiconductor
Pins
64
16
1
1
9
9
8
1
3
4
1
1
9
6
6
4
4
1
5
2
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I

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