MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1591

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.3
Table 25-6
4-byte address spaces within offset 0x000–0xFFF are reserved.
In this table and in the register figures and field descriptions, the following access definitions apply:
Freescale Semiconductor
LSSD_MODE
0xE_2000
0xE_2004
L1_TSTCLK
L2_TSTCLK
THERM[0:1]
Memory
TEST_SEL
Offset
Local
•
•
•
•
•
Signal
TRST
Reserved fields are always ignored for the purposes of determining access type.
R/W, R, and W (read/write, read only, and write only) indicate that all the non-reserved fields in a
register have the same access type.
w1c indicates that all of the non-reserved fields in a register are cleared by writing ones to them.
Mixed indicates a combination of access types.
Special is used when no other category applies. In this case the register figure and field description
table should be read carefully.
Memory Map/Register Definition
shows the memory-mapped debug and watchpoint registers of the MPC8536E. Undefined
WMCR0—Watchpoint monitor control register 0
WMCR1—Watchpoint monitor control register 1
I/O
I
I
I
I
I
I
Table 25-5. JTAG Test and Other Signals—Detailed Signal Descriptions
JTAG test reset.
Used for factory test. Refer to the MPC8536E Integrated Processor Hardware Specifications for proper
treatment.
treatment.
treatment.
The actual value for the resistor varies from device to device, but the linear relationship between
temperature and resistance is consistent. See the Integrated Processor Hardware Specifications for more
information on how to accurately measure the junction temperature of a device. Note that this thermal
resistor is intended for engineering development only.
Used for factory test. Should be negated (pulled high) for normal operation.
Used for factory test. Refer to the MPC8536E Integrated Processor Hardware Specifications for proper
Used for factory test. Refer to the MPC8536E Integrated Processor Hardware Specifications for proper
These signals provide access to an internal resistor that has a value that varies linearly with temperature.
Meaning
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Timing See IEEE 1149.1 standard for more details.
State
Table 25-6. Debug and Watchpoint Monitor Memory Map
Asserted—Causes asynchronous initialization of the internal JTAG TAP controller. Must be
Negated— Normal operation.
asserted during power-on reset in order to properly initialize the JTAG TAP and for normal
operation of the MPC8536E. An unterminated input appears as a high signal level to the
test logic due to an internal pull-up resistor.
Register
Watchpoint Monitor Registers
Description
Access
R/W
R/W
Debug Features and Watchpoint Facility
0x0000_0000
0x0000_0000
Reset
25.3.1.1/25-10
25.3.1.1/25-10
Section/Page
25-9