MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 18

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
10.7.8.4
10.7.8.5
10.7.8.6
10.7.8.7
10.7.8.8
10.7.8.9
11.1
11.1.1
11.1.2
11.1.3
11.2
11.2.1
11.2.2
11.3
11.3.1
11.3.1.1
11.3.1.2
11.3.1.3
11.3.1.4
11.3.1.5
11.3.1.6
11.4
11.4.1
11.4.1.1
11.4.1.2
11.4.1.3
11.4.1.4
11.4.1.5
11.4.1.5.1
11.4.1.5.2
11.4.1.6
11.4.2
11.4.2.1
11.4.3
11.4.4
11.4.4.1
11.4.4.2
xviii
Introduction.................................................................................................................... 11-1
External Signal Descriptions ......................................................................................... 11-3
Memory Map/Register Definition ................................................................................. 11-4
Functional Description..................................................................................................11-11
Overview.................................................................................................................... 11-2
Features...................................................................................................................... 11-2
Modes of Operation ................................................................................................... 11-2
Signal Overview ........................................................................................................ 11-3
Detailed Signal Descriptions ..................................................................................... 11-3
Register Descriptions................................................................................................. 11-5
Transaction Protocol .................................................................................................11-11
Arbitration Procedure .............................................................................................. 11-15
Handshaking ............................................................................................................ 11-16
Clock Control........................................................................................................... 11-16
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
RNGU Status Register ....................................................................................... 10-157
RNGU Interrupt Status Register ........................................................................ 10-158
RNGU Interrupt Mask Register......................................................................... 10-159
RNGU End of Message Register ....................................................................... 10-160
RNGU Entropy Registers .................................................................................. 10-161
RNGU FIFO ...................................................................................................... 10-161
I
I
I
I
I
Digital Filter Sampling Rate Register (I2CDFSRR) ............................................11-11
START Condition ................................................................................................ 11-12
Slave Address Transmission ................................................................................ 11-12
Repeated START Condition ................................................................................ 11-13
STOP Condition................................................................................................... 11-13
Protocol Implementation Details ......................................................................... 11-13
Address Compare—Implementation Details ....................................................... 11-15
Arbitration Control .............................................................................................. 11-15
Clock Synchronization......................................................................................... 11-16
Input Synchronization and Digital Filter ............................................................. 11-16
2
2
2
2
2
C Address Register (I2CADR) ........................................................................... 11-6
C Frequency Divider Register (I2CFDR)........................................................... 11-6
C Control Register (I2CCR) ............................................................................... 11-7
C Status Register (I2CSR) .................................................................................. 11-9
C Data Register (I2CDR).................................................................................. 11-10
Transaction Monitoring—Implementation Details.......................................... 11-14
Control Transfer—Implementation Details ..................................................... 11-14
Contents
I
2
Chapter 11
C Interfaces
Title
Freescale Semiconductor
Number
Page