MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 379

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3
The PIC programmable register map occupies 256 Kbytes of memory-mapped space. Reading undefined
portions of the memory map returns all zeros; writing has no effect. All PIC registers are 32 bits wide and,
although located on 128-bit address boundaries, should be accessed only as 32-bit quantities.
The PIC address offset map, shown in
Freescale Semiconductor
0x1004–0x
0x1024–x1
0x00B4–
0x0014–
0x1040–
0x0FFF
0x10C0
0x10D0
0x003F
0x00A0
0x00B0
0x107F
0x10A0
0x10B0
0x0000
0x0010
0x0040
0x0050
0x0060
0x0070
0x0080
0x0090
0x1000
0x1020
0x1080
0x1090
Offset
101F
003F
•
•
•
0xnn4_0000–0xnn4_FFF0—Global registers
0xnn5_0000–0xnn5_FFF0—Interrupt source configuration registers
0xnn6_0000–0xnn6_FFF0—Per-CPU registers
Memory Map/Register Definition
BRR1—Block revision register 1
BRR2—Block revision register 2
Reserved
IPIDR0—Interprocessor interrupt 0 (IPI 0) dispatch register
IPIDR1—IPI 1 dispatch register
IPIDR2—IPI 2 dispatch register
IPIDR3—IPI 3 dispatch register
CTPR—Current task priority register
WHOAMI—Who am I register
IACK—Interrupt acknowledge register
EOI—End of interrupt register
Reserved
FRR—Feature reporting register
Reserved
GCR—Global configuration register
Reserved
Vendor reserved
VIR—Vendor identification register
PIR—Processor core initialization register
IPIVPR0—IPI 0 vector/priority register
IPIVPR1—IPI 1 vector/priority register
IPIVPR2—IPI 2 vector/priority register
IPIVPR3—IPI 3 vector/priority register
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Global Registers—Block Base Address: 0x4_0000
Table 9-4. PIC Register Address Map
Register
Table
9-4, is divided into three areas:
Access
R/W
R/W
R/W
R/W
Programmable Interrupt Controller (PIC)
—
—
—
—
—
W
W
R
R
R
R
R
R
0x006B_0 n 02
0x0000_0001
0x0000_0000
0x0000_000F
0x0000_00 nn
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x8000_0000
Reset
—
—
—
—
—
Section/Page
9.3.1.1/9-19
9.3.1.2/9-19
9.3.8.1/9-48
9.3.8.2/9-49
9.3.8.3/9-50
9.3.8.4/9-50
9.3.8.5/9-51
9.3.1.3/9-20
9.3.1.4/9-21
9.3.1.5/9-21
9.3.1.6/9-22
9.3.1.7/9-22
—
—
—
—
—
9-9