MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1248

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SATA Controller
19.3.3.3
SControl, shown in
software controls SATA interface capabilities. Writes to the SControl register result in an action being
taken by the host adapter or interface. Reads from the register return the last value written to it.
19-18
7–2
Bit
Offset 0x1_8108
Reset 0
9
8
1
0
W
R
31
Name
0
ITG
SATA Interface Control Register (SControl)
—
M
C
T
0
0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure
Non-recovered persistent communication or data integrity error. A communication error that was not
recovered occurred that is expected to be persistent. Because the error condition is expected to be
persistent, the operation need not be retried by the host software. Persistent communications errors
may arise from faulty interconnect with the device, from a device that has been removed or has failed,
or a number of other causes.
Non-recovered transient data integrity error: A data integrity error occurred that was not recovered by
the interface. Because the error condition is not expected to be persistent, the operation should be
retried by the host software.
Recovered communications error. Communications between the device and host were temporarily lost
but were re-established. This can arise from a device temporarily being removed, from a temporary
loss of PHY synchronization, or from other causes, and may be derived from the PHYRDY n signal
between the PHY and link layers. No action is required by the host software, because the operation
ultimately succeeded. However, the host software may elect to track such recovered errors to gauge
overall communications integrity and potentially step down the negotiated communication speed.
through a retry operation or other recovery action. This can arise from a noise burst in the
transmission, a voltage supply variation, or other causes. No action is required by host software,
because the operation ultimately succeeded. However, the host software may elect to track such
recovered errors to gauge overall communications integrity and potentially step down the negotiated
communication speed.
Reserved
Recovered data integrity error. A data integrity error occurred that was recovered by the interface
0
0
Figure 19-15. SATA Interface Control Register (SControl)
19-15, is a 32-bit read-write register that provides the interface by which
0
Table 19-14. SError Field Descriptions (continued)
0
—
0
0
21 20 19 18 17 16 15
0
0
0
0
0
0
Description
0
SPM
0
0
12 11
0
0
0
IPM
1
1
8
0
7
Freescale Semiconductor
0
SPD
0
Access: Read/Write
4
0
0
3
0
DET
0
0
0