MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1039

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
0xDB4–
0xDD4–
0xC94–
0xDF4–
0xDBC
0xDCC
0xDDC
0xDEC
0xD9C
0xDAC
0xDC0
0xDC4
0xDC8
0xDD0
0xDFC
Offset
0xDA0
0xDA4
0xDA8
0xDB0
0xDE0
0xDE4
0xDE8
0xDF0
0xE0C
0xE1C
0xE00
0xE04
0xE08
0xE10
0xE14
0xE18
0xE20
Reserved
PITAR3—PCI inbound window 3 translation address register
Reserved
PIWBAR3—PCI inbound window 3 base address register
PIWBEAR3—PCI inbound window 3 base extended address register
PIWAR3—PCI inbound window 3 attributes register
Reserved
PITAR2—PCI inbound window 2 translation address register
Reserved
PIWBAR2—PCI inbound window 2 base address register
PIWBEAR2—PCI inbound window 2 base extended address register
PIWAR2—PCI inbound window 2 attributes register
Reserved
PITAR1—PCI inbound window 1 translation address register
Reserved
PIWBAR1—PCI inbound window 1 base address register
Reserved
PIWAR1—PCI inbound window 1 attributes register
Reserved
ERR_DR—PCI error detect register
ERR_CAP_DR—PCI error capture disabled register
ERR_EN—PCI error enable register
ERR_ATTRIB—PCI error attributes capture register
ERR_ADDR—PCI error address capture register
ERR_EXT_ADDR—PCI error extended address capture register
ERR_DL—PCI error data low capture register
ERR_DH—PCI error data high capture register
GAS_TIMR—PCI gasket timer register
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 16-3. PCI Memory-Mapped Register Map (continued)
Register
0xDC0–0xDDC–Inbound Window 2
0xDA0–0xDBC–Inbound Window 3
0xDE0–0xDFC–Inbound Window 1
PCI Error Management Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
—
—
—
—
—
—
—
0x0100_3FFF
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
—
—
—
—
—
16.3.1.3.1/16-20
16.3.1.3.2/16-20
16.3.1.3.3/16-21
16.3.1.3.4/16-21
16.3.1.3.1/16-20
16.3.1.3.2/16-20
16.3.1.3.3/16-21
16.3.1.3.4/16-21
16.3.1.3.1/16-20
16.3.1.3.2/16-20
16.3.1.3.4/16-21
16.3.1.4.1/16-24
16.3.1.4.2/16-25
16.3.1.4.3/16-26
16.3.1.4.4/16-27
16.3.1.4.5/16-28
16.3.1.4.6/16-28
16.3.1.4.7/16-29
16.3.1.4.8/16-29
16.3.1.4.9/16-29
PCI Bus Interface
Section/page
16-13