MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1213

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
PCI Express configuration transactions are accepted. Refer to
Section 17.3.10.18, “Configuration Ready
Register—0x4B0,” for more information about the CFG_READY bit.
In boot hold-off mode (cfg_cpu_boot = 0), the core is prevented from fetching its first instruction by
withholding its internal bus grant. During this time, the PCI Express interface accepts all inbound PCI
Express configuration transactions which allows an external host/RC to configure the device. When the
external host/RC has configured the device to a state where it can allow the core to fetch code from the
boot vector, it sets the EEBPCR[CPU_EN] bit after which the core is granted the internal bus.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Freescale Semiconductor
17-117