MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1008

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DMA Controller
15.3.1.12
The source stride register, shown in
stride information is loaded when a new list descriptor is read from memory. Therefore, the source stride
register is applicable for all link descriptors in the new list. Changing the source stride information for a
link requires that a new list be generated.
Table 15-20
15.3.1.13
The destination stride register contains the stride size, and distance. Note that the destination stride
information is loaded when a new list descriptor is read from memory. Therefore, the destination stride
register is applicable for all link descriptors in the new list. Changing the destination stride information for
a link requires that a new list be generated.
15-22
20–31
8–19
Offset 0x140
Offset 0x144
Reset
Bits
Reset
0–7
W
W
R
R
0x1C0
0x240
0x2C0
0x1C4
0x244
0x2C4
0
0
Name
SSS
SSD
—
describes the fields of the SSRn.
Source Stride Registers (SSR n )
Destination Stride Registers (DSR n )
Reserved
Source stride size. Number of bytes to transfer before jumping to the next address as specified in the source
stride distance field.
Source stride distance. The source stride distance in bytes from start byte to start byte.
—
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 15-21. Destination Stride Registers (DSR n )
7
7
Figure 15-20. Source Stride Registers (SSR n )
8
8
Table 15-20. SSR n Field Descriptions
Figure
15-20, contains the stride size and distance. Note that the source
Figure 15-21
DSS
SSS
All zeros
All zeros
Description
describes the DSRn.
19 20
19 20
Freescale Semiconductor
SSD
DSD
Access: Read/Write
Access: Read/Write
31
31