MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 202

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset, Clocking, and Initialization
Notes on compatibility with FAT12/FAT16/FAT32 Filesystems
Depending upon application, compatibility may be desired between the SD/MMC Card data structure
defined here and the FAT12, FAT16 or FAT32 filesystems (documented in SD Card Specifications
Part 2—File System Specification v2.0, among other places). This compatibility is possible, but imposes
a limit on the number of Configuration Words that can be parsed by the processor prior to fetching the
user’s code. Compatibility is achieved by ensuring that the entire data structure of Control Words and
Configuration Words is contained within the first 446-byte (0x1BE) Master Boot Record code area of the
filesystem.
Given that Configuration Words start at address 0x80, and all Configuration Words (except the last one
with EC=1 to end the configuration) occupy 8 bytes per Configuration Address/Data pair, this imposes the
limit of a maximum of 40 Configuration Address words. More Configuration Words can be used in
applications for which compatibility with the FAT Master Boot Record is not required. If exactly 40
Configuration Address words are used and FAT12/FAT16/FAT32 compatibility is required, then the final
Configuration Data word must be omitted to ensure that the data structure fits in less than 446 bytes.
Note that FAT12, FAT16 and FAT32 standards impose additional requirements on the data structures that
must be present on the SD/MMC card, such as Partition Tables and a fixed Signature Word at the end of
the Master Boot Record. These features are not interpreted or required by the eSDHC boot process, and
are outside the scope of this document.
Furthermore, FAT12 and FAT16 define a boot sector with defined fields in the first 0x36 addressable bytes
(which does not conflict with the SD/MMC Card Data Structure for boot from SD/MMC defined in this
document). Therefore FAT12 and FAT16 filesystems are completely compatible with the defined data
structure, even if they also contain a FAT boot sector. However, FAT32 defines a boot sector with defined
4-32
2–29
Bits
30
31
0
1
Name
CNT
DLY
EC
—
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 4-37. Config Address Field Description, CNT = 1
End Configuration. Indicates the end of the configuration stage. Valid only if bit CNT is set.
Delay. Instruct the e500 core to perform delay according to the number that is specified in
the adjacent Config Data field. The adjacent Config Data field provides the delay measured
in terms of the number of 8 CCB clocks. Valid only if bit CNT is set.
Reserved. Must be zero.
Reserved. Must be zero.
Control. Select between Address mode and Control mode.
Note: When CNT=1, bits 0–29 select the control instruction. Only one bit in the range of bits
0 Not the last Config Address field.
1 The Last Config Address field. The e500 core will stop the configuration stage and
This must be set for Config Address Word N, and not be set for Config Address words
0 No delay.
1 Delay.
(0 Address mode)
1 Control mode
start to copy the user’s code.
prior to Config Address Word N.
0–29 can be set at any specific control instruction. A control instruction with bits 0–29
all cleared is also illegal.
Description
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