MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 404
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MPC8536E-ANDROID
Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets
1.MPC8536EBVTAVLA.pdf
(127 pages)
2.MPC8536EBVTAVLA.pdf
(2 pages)
3.MPC8536EBVTAVLA.pdf
(1706 pages)
Specifications of MPC8536E-ANDROID
Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 404 of 1706
- Download datasheet (15Mb)
Programmable Interrupt Controller (PIC)
9.3.4.2
Figure 9-26
Table 9-28
9.3.4.3
Figure 9-27
Table 9-29
9.3.5
The following registers support the message register interrupts:
9-34
Offset PM0MR1: 0x1360; PM1MR1: 0x1380; PM2MR1: 0x13A0; PM3MR1: 0x13C0
Reset
Offset PM0MR2: 0x1364; PM1MR2: 0x1384; PM2MR2: 0x13A4; PM3MR2: 0x13C4
Reset 1
W
•
•
•
•
W
0–31
0–31
R
Bits Name
Bits Name
R
0
0
Section 9.3.5.1, “Message Registers
Section 9.3.5.2, “Message Enable Register
Section 9.3.5.3, “Message Status Register
Section 9.3.7.5, “Messaging Interrupt Vector/Priority Registers
INT
1
INT Internal interrupts 32–64
describes the PMnMR1 registers.
describes the PMnMR2 registers.
Message Registers
shows the PMnMR1 registers.
shows the PMnMR2 registers.
1
Performance Monitor Mask Registers 1 (PM0MR1–PM3MR1)
Performance Monitor Mask Registers 2 (PM0MR2–PM3MR2)
Internal interrupts 0–31
0 The corresponding interrupt source generates a performance monitor event when the interrupt occurs.
1 The corresponding interrupt does not generate a performance monitor event.
0 The corresponding interrupt source generates a performance monitor event when the interrupt occurs.
1 The corresponding interrupt does not generate a performance monitor event.
1
1
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 9-26. Performance Monitor Mask Registers 1 (PM n MR1)
Figure 9-27. Performance Monitor Mask Registers 2 (PM n MR2)
1
1
1
1
Table 9-28. PM n MR1 Field Descriptions
Table 9-29. PM n MR2 Field Descriptions
1
1
1
(MSGR0–MSGR7)”
1
1
(MSR)”
1
(MER)”
All ones
Description
1
Description
INT
INT
1
1
1
1
1
(MIVPRn)”
1
1
1
1
Freescale Semiconductor
1
1
Access: Read/Write
Access: Read/Write
1
1
1
1
31
31
1
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