MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 176

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MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset, Clocking, and Initialization
4.3.1.2.1
Figure 4-2
Table 4-6
4.3.1.2.2
Figure 4-3
Table 4-7
4-6
24–31
8–23
Bits
1–6
Bits
0–7
Offset 0x0_0010
Reset
Offset 0x0_0008
Reset
0
W
W
R
R
EN
BASE_ADDR Identifies the16 most significant address bits of an alternate window used for configuration accesses.
0
0
defines the bit fields of ALTCBAR.
defines ALTCAR fields.
Name
shows the fields of ALTCBAR.
shows the fields of ALTCAR.
EN
Name
1
Alternate Configuration Base Address Register (ALTCBAR)
Alternate Configuration Attribute Register (ALTCAR)
Figure 4-2. Alternate Configuration Base Address Register (ALTCBAR)
Enable second configuration window. Like CCSRBAR, it has a fixed size of 1 Mbyte.
0 Second configuration window is disabled.
1 Second configuration window is enabled.
Write reserved, read = 0
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Figure 4-3. Alternate Configuration Attribute Register (ALTCAR)
Write reserved, read = 0
Like CCSRBAR, this alternate window has a fixed size of 1 Mbyte.
Write reserved, read = 0
6
7
7
TRGT_ID
8
Table 4-6. ALTCBAR Bit Settings
Table 4-7. ALTCAR Bit Settings
11 12
BASE_ADDR
All zeros
All zeros
Description
Description
23 24
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
31
31

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