MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 70

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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PCI Error Attributes Capture Register (ERR_ATTRIB)..................................................... 16-27
PCI Error Address Capture Register (ERR_ADDR) .......................................................... 16-28
PCI Error Extended Address Capture Register (ERR_EXT_ADDR) ................................ 16-28
PCI Error Data Low Capture Register (ERR_DL) ............................................................. 16-29
PCI Error Data High Capture Register (ERR_DH) ............................................................ 16-29
PCI Gasket Timer Register (GAS_TIMR).......................................................................... 16-29
Common PCI Configuration Header................................................................................... 16-30
PCI Vendor ID Register ...................................................................................................... 16-30
PCI Device ID Register....................................................................................................... 16-31
PCI Bus Command Register ............................................................................................... 16-31
PCI Bus Status Register ...................................................................................................... 16-33
PCI Revision ID Register.................................................................................................... 16-34
PCI Bus Programming Interface Register........................................................................... 16-34
PCI Subclass Code Register................................................................................................ 16-35
PCI Bus Base Class Code Register ..................................................................................... 16-35
PCI Bus Cache Line Size Register...................................................................................... 16-35
PCI Bus Latency Timer Register ........................................................................................ 16-36
PCI Configuration and Status Register Base Address Register (PCSRBAR) .................... 16-37
32-Bit Memory Base Address Register .............................................................................. 16-37
64-Bit Low Memory Base Address Register ...................................................................... 16-37
64-Bit High Memory Base Address Register ..................................................................... 16-38
PCI Subsystem Vendor ID Register .................................................................................... 16-38
PCI Subsystem ID Register................................................................................................. 16-39
PCI Bus Capabilities Pointer Register ................................................................................ 16-39
PCI Bus Interrupt Line Register.......................................................................................... 16-39
PCI Bus Interrupt Pin Register............................................................................................ 16-40
PCI Bus Minimum Grant Register (MIN_GNT) ................................................................ 16-40
PCI Bus Maximum Latency Register (MAX_LAT) ........................................................... 16-41
PCI Bus Function Register.................................................................................................. 16-41
PCI Bus Arbiter Configuration Register ............................................................................. 16-42
PCI Arbitration Example .................................................................................................... 16-44
PCI Single-Beat Read Transaction...................................................................................... 16-51
PCI Burst Read Transaction................................................................................................ 16-51
PCI Single-Beat Write Transaction..................................................................................... 16-52
PCI Burst Write Transaction ............................................................................................... 16-52
PCI Target-Initiated Terminations....................................................................................... 16-55
DAC Single-Beat Read Example........................................................................................ 16-57
DAC Burst Read Example .................................................................................................. 16-57
DAC Single-Beat Write Example ....................................................................................... 16-58
DAC Burst Write Example ................................................................................................. 16-58
Standard PCI Configuration Header ................................................................................... 16-59
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
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