MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 530

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Offset 0x3_F018
Reset
Security Engine (SEC) 3.0
10.7.3.4
The data size register is written with the number of bits of data to be processed. Writing to this register
puts the CRCU module into a busy state and starts data processing. This register may be written multiple
times while data processing is in progress. The actual values written are ignored, although an error is
generated if the value is not a multiple of 8 bits.
10.7.3.5
The reset control register controls the reset/re-initialization of the block.
Table 10-42
10-100
Offset 0x3_F008
Offset 0x3_F010
Reset
Reset
0–60
Bits
61
W
R
W
W
R
R
0
0
0
Name
—
RI
describes CRCU reset control register fields.
CRCU Data Size Register
CRCU Reset Control Register
Reserved
Reset Interrupt. Writing this bit active high causes CRCU interrupts signaling done and error to be reset. It
further resets the state of the CRCU interrupt status register.
0 Do not reset
1 Reset interrupt logic
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 10-42. CRCU Reset Control Register Field Descriptions
Figure 10-43. CRCU Reset Control Register
Figure 10-42. CRCU Data Size Register
Figure 10-41. CRCU Key Size Register
—
—
All zeros
All zeros
All zeros
Description
51 52
51 52
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
Access: Read/Write
60
Data Size
Key Siz
RI
61
MI
62
63
63
SR
63