MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 212

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reset, Clocking, and Initialization
This configuration results in a 32-bit byte address with a 0-bit effective page number. Therefore the 36-bit
real address is equal to the 32-bit effective address, with the 4 MSbits of the 36-bit real address equal to 0.
The on-chip ROM code does not setup any Local Access Windows. Access to CCSR address space (and
therefore by extension, also access to the on-chip ROM) doesn’t require a Local Access Window. It is the
user’s responsibility to setup a local access window through a Control Word address/data pair for the
desired Target Address and Execution Starting Address (which will typically be in either DDR or Local
Bus memory space).
Note that any such local access window configured at this time must have the 4 MSbits of the address equal
to 0. This is due to the 32-bit addressing enabled by the e500 MMUs as described above.
The user can reconfigure the system in the user code portion based on system requirements.
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UX/UR/UW=000 (No user mode access allowed)
WIMGE=01110 (Cache-inhibited, Memory coherency required, Guarded)
X0–X1=00
U0–U3=0
IPROT=1 (Page is protected from invalidation)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Freescale Semiconductor