MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 617

no-image

MPC8536E-ANDROID

Manufacturer Part Number
MPC8536E-ANDROID
Description
HARDWARE/SOFTWARE ANDROID OS
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr

Specifications of MPC8536E-ANDROID

Contents
Board
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Master Xmit
Generate
STOP
Master Rcv
I2CCR[TXAK]
Write next byte
Set
to I2CDR
Y
EOI
Next-to-last
I2CCR[TXAK]
N
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
byte
N
Y
Figure 11-11. Example I
Set
I2CCR[MTX]
== 1
End of address phase for
Last byte
master receive mode?
== 1
Read I2CDR
Last byte
and store
Y
N
EOI
Clear I2CCR[MTX]
A
(dummy read)
Only one byte
Read I2CDR
I2CSR[RXAK]
to receive?
N
Generate
STOP
== 0
== 0
Y
Y
N
A
== 1
2
C Interrupt Service Routine Flowchart
Clear I2CSR[MIF]
Slave Xmit
I2CCR[MSTA]
Slave Data Cycle
Clear I2CCR[MTX]
(dummy read)
Read I2CDR
Clear I2CSR[MAL]
== 1
I2CSR[MAAS]
Slave Addr. Phase
EOI
Set I2CCR[MTX]
I2CSR[RXAK]
== 0
Write I2CDR
== 0
== 1
== 1
Write next byte
== 0
to I2CDR
== 1
== 1
I2CSR[MAL]
EOI
I2CSR[SRW]
B
EOI
I2CCR[MTX]
B
I2CSR[MAAS]
Clear I2CCR[MTX]
Slave Receive
Dummy read
== 0
== 0
Set I2CCR[TXAK]
== 0
N
== 0
Read I2CDR
All done
and store
== 1
Y
B
I
2
C Interfaces
11-25

Related parts for MPC8536E-ANDROID