MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 500

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Security Engine (SEC) 3.0
IEEE P1619 describes XTS mode as a tweakable block cipher used for encryption of sector-based storage.
The key material for XTS consists of a data encryption key (used by the AES block cipher) as well as a
tweak key that is used to incorporate the logical position of the data block into the encryption. The key is
parsed as a concatenation of two fields of equal size called Key1 and Key2 (16 or 32 bytes each).
A 256-bit or 512-bit key is associated with an ordered sequence of sectors, numbered consecutively. The
sequence of sectors that are associated with the key is related to the scope of that key. In order to encrypt
or decrypt a sector, the sequence number of this sector within the scope of the key (I) must be known. Each
16-byte block within the sector has its own sequence number that gives the logical position of the data
block inside the sector.
The tweak value (T) is computed based on both the sector number (I) and the 16-byte block number within
the sector (j) as
T
T
xtime(L) is defined as follows, where L is a 128-bit vector with L[127] as most significant bit:
where L is a 128-bit vector and L[127] is it’s most significant bit. The irreducible polynomial
When the last block of the message is not a full 16-byte block, processing of the last two blocks implements
a borrowing mechanism whereby bits from the next-to-last block ciphertext are appended to the last block
plaintext to pad it out to a 16-byte boundary. This is described in detail in IEEE P1619.
For sector byte sizes that are divisible by 16, XTS mode also supports processing of multiple sectors per
session where the sector sequence number (I) is automatically incremented. When multiple sectors are
decrypted, the tweak key (Key2) is expanded once for the initial tweak computation pertaining to the first
sector; this expanded value is directly used for other sectors. In case that a message needs to be processed
in multiple XTS sessions, message splitting must be on a sector boundary.
XTS cipher mode uses context register 1 for the index (I) and context register 2 for the sector size (see
Table
For host-controlled operation of the
10-70
f
f
0
j
=
=
= xtime
1. Reset
2. Write the Mode Register to:
3. Load Key
4. Load I into context register 1 and the sector size in bytes into context register 2. Note that I must be
= AES_encrypt(I, Key2);
•
•
128
128
10-29).
a.
b.
written as big-endian (LSB in the left-most bit positions 63-56), while sector size must be in
If L[127]=0, then xtime(L)=L<<1 (where ‘<<‘ denotes bitwise left shift)
Else xtime(L) = (L<<1) XOR 0x87.
+
+
j
7
7
(T
Set Cipher Mode to XTS
Specify encryption/decryption
+
+
0
);
2
2
+
+
+
+
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
1
1
Context and Operation for XTS Cipher Mode
is used in the tweak calculation.
AESU in XTS cipher mode, the following steps must be performed:
Freescale Semiconductor