MPC8536E-ANDROID Freescale Semiconductor, MPC8536E-ANDROID Datasheet - Page 1638

• Manufacturer Part Number: MPC8536E-ANDROID
• Description: HARDWARE/SOFTWARE ANDROID OS
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC ™r
• Type: MPUr

Specifications of MPC8536E-ANDROID

• Contents: Board
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Complete List of Configuration, Control, and Status Registers
A-26
0x2_46CC RUND—Receive undersize packet counter
0x2_46DC RDRP—Receive drop counter
0x2_46AC RBCA—Receive broadcast packet counter
0x2_46BC RALN—Receive alignment error counter
0x2_46C0 RFLR—Receive frame length error counter
0x2_46C4 RCDE—Receive code error counter
0x2_46C8 RCSE—Receive carrier sense error counter
0x2_46D0 ROVR—Receive oversize packet counter
0x2_46D4 RFRG—Receive fragments counter
0x2_46D8 RJBR—Receive jabber counter
0x2_46EC TBCA—Transmit broadcast packet counter
0x2_46FC TSCL—Transmit single collision packet counter
0x2_470C TNCL—Transmit total collision counter
0x2_471C TFCS—Transmit FCS error counter
0x2_472C TFRG—Transmit fragments frame counter
0x2_46B0 RXCF—Receive control frame packet counter
0x2_46B4 RXPF—Receive PAUSE frame packet counter
0x2_46B8 RXUO—Receive unknown OP code counter
0x2_46E0 TBYT—Transmit byte counter
0x2_46E4 TPKT—Transmit packet counter
0x2_46E8 TMCA—Transmit multicast packet counter
0x2_46F0 TXPF—Transmit PAUSE control frame counter
0x2_46F4 TDFR—Transmit deferral packet counter
0x2_46F8 TEDF—Transmit excessive deferral packet counter
0x2_4700 TMCL—Transmit multiple collision packet counter
0x2_4704 TLCL—Transmit late collision packet counter
0x2_4708 TXCL—Transmit excessive collision packet counter
0x2_4710 Reserved
0x2_4714 TDRP—Transmit drop frame counter
0x2_4718 TJBR—Transmit jabber frame counter
0x2_4720 TXCF—Transmit control frame counter
0x2_4724 TOVR—Transmit oversize frame counter
0x2_4728 TUND—Transmit undersize frame counter
eTSEC1
Offset
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table A-2. Module Memory Map (continued)
Name
1
eTSEC Transmit Counters
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
Freescale Semiconductor
14.5.3.6.25/14-100
14.5.3.6.26/14-100
14.5.3.6.27/14-101
14.5.3.6.28/14-101
14.5.3.6.29/14-102
14.5.3.6.30/14-102
14.5.3.6.31/14-103
14.5.3.6.32/14-103
14.5.3.6.33/14-104
14.5.3.6.34/14-104
14.5.3.6.35/14-105
14.5.3.6.36/14-105
14.5.3.6.37/14-106
14.5.3.6.38/14-106
14.5.3.6.39/14-107
14.5.3.6.40/14-107
14.5.3.6.41/14-108
14.5.3.6.42/14-108
14.5.3.6.43/14-109
14.5.3.6.12/14-93
14.5.3.6.13/14-94
14.5.3.6.14/14-94
14.5.3.6.15/14-95
14.5.3.6.16/14-95
14.5.3.6.17/14-96
14.5.3.6.18/14-96
14.5.3.6.19/14-97
14.5.3.6.20/14-97
14.5.3.6.21/14-98
14.5.3.6.22/14-98
14.5.3.6.23/14-99
14.5.3.6.24/14-99
Section/Page
—