MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 1041

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

If Test A is true and FRINDEX[2–0] is zero or one, then this is a case 2a or 2b scheduling boundary (see
Figure
details in handling this condition.
If Test A and Test B evaluate to true, then the host controller executes a complete-split transaction using
the transfer state of the current siTD. When the host controller commits to executing the complete-split
transaction, it updates QH[C-prog-mask] by bit-ORing with cMicroFrameBit. The transfer state is
advanced based on the completion status of the complete-split transaction. To advance the transfer state of
an IN siTD, the host controller must:
Note that if the host controller encounters a condition where siTD[Total Bytes To Transfer] is zero, and it
receives more data, the host controller must not write the additional data to memory. The
siTD[Status-Active] bit must be cleared and the siTD[Status-Babble Detected] bit must be set. The fields
siTD[Total Bytes To Transfer], siTD[Current Offset], and siTD[P] are not required to be updated as a result
of this transaction attempt.
The host controller accepts (assuming good data packet CRC and sufficient room in the buffer as indicated
by the value of siTD[Total Bytes To Transfer]) MDATA and DATA0/1 data payloads up to and including
192 bytes. The host controller may optionally clear siTD[Status-Active] and set siTD[Status-Babble
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16-57). See
Test B. The siTD[C-prog-mask] bit vector is checked to determine whether the previous complete
splits have been executed. An example algorithm is given below (this is slightly different than the
algorithm used in
which this test is applied depends on the current value of FRINDEX[2–0]. If FRINDEX[2–0] is 0
or 1, it is not applied until the back pointer has been used. Otherwise it is applied immediately.
Decrement the number of bytes received from siTD[Total Bytes To Transfer]
Adjust siTD[Current Offset] by the number of bytes received
Adjust the siTD[P] (page select) field if the transfer caused the host controller to use the next page
pointer
Set any appropriate bits in the siTD[Status] field, depending on the results of the transaction.
Algorithm Boolean CheckPreviousBit(siTD.C-prog-mask, siTD.C-mask, cMicroFrameBit)
Begin
End Algorithm
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Boolean rvalue = TRUE;
previousBit = cMicroFrameBit rotate-right(1)
-- Bit-wise anding previousBit with C-mask indicates whether there
-- was an intent to send a complete split in the previous micro-
-- frame. So, if the 'previous bit' is set in C-mask, check
-- C-prog-mask to make sure it happened.
if previousBit bitAND siTD.C-mask then
End if
Return rvalue
Section 16.6.12.3.6, “Complete-Split for Scheduling Boundary Cases 2a, 2b,”
if not (previousBit bitAND siTD.C-prog-mask) then
End if
Section 16.6.12.2.7, “Periodic
Interrupt—Do-Complete-Split”). The sequence in
Universal Serial Bus Interface
rvalue = FALSE
for
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