MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 889

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.6.4.2.5
The eTSEC frame parser always provides values for all properties, even where the relevant headers are not
available. In the latter case, the filer is given default properties that can be used to avoid conflict with
normal, defined property values. Accordingly, the rules in the filer table can be partitioned into rule sets
such that if all rules in a given set fail (due to headers being unavailable), lower priority rule sets can be
subsequently searched until either a rule set provides a match or a single default—catch-all—rule specifies
a definite receive queue. For example, an IEEE 802.1p priority rule set may be followed by an IP TOS rule
set, followed by a default rule; thus, if no VLAN tag appears in the received frame, the TOS rules are
checked, or the default is activated should no IP header be present.
The rule cluster feature is used to conditionalize evaluation of rule sets. Typically, this avoids evaluating
rules based on properties that may not be valid or relevant to the filing or filtering decision. For example,
TCP-related rules might be clustered behind a guard rule that checks that a TCP header has appeared and
the IP address matches our home address. Property 1—the parse flags property—is provided specifically
to check the characteristics of the received frame and the parser error status. The mask_register is typically
assigned beforehand to extract specific flags, in which case care should be taken that mask_register be
reassigned an appropriate mask vector for following comparisons.
In many cases it is possible to write the entire filer table before using eTSEC, as the rule set is static.
However, dynamic rule updates can be supported by pre-allocating partially instantiated rule sets, which
software rewrites as necessary. Rules that are not instantiated should be composed of empty entries, as
indicated in
eTSEC’s receive function.
15.6.4.2.6
This example, shown in
This matches against property 1001, comparing each specific priority level in order to associate them with
a RxBD ring index. Note that if a VLAN tag does not appear in the frame, the parser passes priority 0 to
the filer, which always matches the rule at entry 7 and terminate the table search.
Freescale Semiconductor
Table
Entry
0
1
2
3
4
5
CLE REJ AND
0
0
0
0
0
0
Table
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Setting Up the Receive Queue Filer Table
Filer Example—802.1p Priority Filing
0
0
0
0
0
0
15-155. In many cases empty entries can be overwritten by software without stopping
RQCTRL Fields
0
0
0
0
0
0
Table
Table 15-157. Filer Table Example—802.1p Priority Filing
000_000
000_001
000_010
000_011
000_100
000_101
Q
15-157, illustrates how to file frames according to layer 2 802.1p priority.
CMP
00
00
00
00
00
00
1001
1001
1001
1001
1001
1001
PID
0x0000_0007 File priority 7 to ring 0
0x0000_0006 File priority 6 to ring 1
0x0000_0005 File priority 5 to ring 2
0x0000_0004 File priority 4 to ring 3
0x0000_0003 File priority 3 to ring 4
0x0000_0002 File priority 2 to ring 5
RQPROP
Comment
Enhanced Three-Speed Ethernet Controllers
0x0000_0C09
0x0000_0009
0x0000_0409
0x0000_0809
0x0000_1009
0x0000_1409
RQCTRL
Word
15-171