MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 504

Manufacturer Part Number

MPC8313ZQADDC

Microprocessors - MPU 8313 REV2.2 PB NO ENC

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Interface Type

Mounting Style

Package / Case

Number Of Programmable I/os

Number Of Timers

Manufacturer

BOSTOCK HK LIMITED

Part Number:

MPC8313ZQADDC

Manufacturer:

Freescale Semiconductor

Enhanced Local Bus Controller

Boot chip-select operation allows address decoding for a boot ROM before system initialization. LCS0 is

the boot chip-select output; its operation differs from other external chip-select outputs after a system reset.

When the core begins accessing memory after system reset, LCS0 is asserted for every local bus access

until BR0 or OR0 is reconfigured.

The boot chip-select also provides a programmable port size, which is configured during reset. The boot

chip-select does not provide write protection. LCS0 operates this way until the first write to OR0 and it

can be used as any other chip-select register after the preferred address range is loaded into BR0. After the

first write to OR0, the boot chip-select can be restarted only with a hardware reset.

the initial values of the boot bank in the memory controller.

GPCM Boot Chip-Select Operation

MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2

Table 10-34. Boot Bank Field Values after Reset for GPCM as Boot Controller

Figure 10-43. External Termination of GPCM Access

Latched Address

0000_0000_0000_0000_0

From RCWH[ROMLOC]

Freescale Semiconductor