MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 460

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Enhanced Local Bus Controller
10.3.1.2.1
The address mask field of the option registers (ORn[AM]) masks up to 17 corresponding BRn[BA] fields.
The 15 LSBs of the 32-bit internal transaction address do not participate in bank address matching in
selecting a bank for access. Masking address bits independently allows external devices of different size
address ranges to be used. Address mask bits can be set or cleared in any order in the field, allowing a
resource to reside in more than one area of the address map.
32 Kbytes to 4 Gbytes. Memory block sizes vary from 32 Kbytes to 4 Gbytes in FCM mode, and
32 Kbytes to 64 Mbytes in GPCM and UPM modes.
10-12
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Address Mask
Table 10-6. Memory Bank Sizes in Relation to Address Mask
0000_0000_0000_0000_0
1000_0000_0000_0000_0
1100_0000_0000_0000_0
1110_0000_0000_0000_0
1111_0000_0000_0000_0
1111_1000_0000_0000_0
1111_1100_0000_0000_0
1111_1110_0000_0000_0
1111_1111_0000_0000_0
1111_1111_1000_0000_0
1111_1111_1100_0000_0
1111_1111_1110_0000_0
1111_1111_1111_0000_0
1111_1111_1111_1000_0
1111_1111_1111_1100_0
1111_1111_1111_1110_0
1111_1111_1111_1111_0
1111_1111_1111_1111_1
AM
Memory Bank Size
Table 10-6
512 Mbytes
256 Mbytes
128 Mbytes
512 Kbytes
256 Kbytes
128 Kbytes
64 Mbytes
32 Mbytes
16 Mbytes
64 Kbytes
32 Kbytes
4 Gbytes
2 Gbytes
8 Mbytes
4 Mbytes
2 Mbytes
1 Gbyte
1 Mbyte
shows memory bank sizes from
Freescale Semiconductor