MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 211

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

In this example, the local access window of the boot ROM is defined as window number 1, on a local bus
device, in the highest 8 Mbytes of memory as set by the reset configuration word high during the reset
sequence (see
“LBLAWBAR0[BASE_ADDR] Reset Value.”
memory used for memory-mapped registers (IMMR), is a fixed 1-Mbyte space pointed to by the
IMMRBAR register, using its default value (0xFF40_0000). See
Registers Base Address Register (IMMRBAR).”
5.2.1
In addition to any address translation performed by the e300c3 core MMU, three distinct types of
translation and mapping operations are performed on transactions at the integrated device level. These are
as follows:
The local access windows perform target mapping for transactions within the local address space. The
local access windows do not perform any address translation.
Outbound windows perform the mapping from the local 32-bit address space to the address space of PCI,
which may be much larger than the local space.
Inbound windows perform address translation from the external address spaces of PCI to the local address
space.
The target mappings created by an inbound window must be consistent with those of the local access
windows. That is, if an inbound window maps a transaction to a given local address, a valid local access
window for that address must be set independently.
All of the configuration registers that define mapping of local access windows follow the same register
format.
Windows must be a power-of-two size. To perform a mapping function, the address of the transaction is
compared with the base address register of each window. The number of bits used in the comparison is
dictated by each window’s size attribute. When an address hits within a window, the transaction is directed
to the appropriate target.
Freescale Semiconductor
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•
•
1
Base address
Window size/attributes
An exception is the IMMR window, which is always enabled and has a fixed 1-Mbyte size.
Mapping a local address to a target interface
Translating the local 32-bit address to an external address space
Translating external addresses to the local 32-bit address space
Table 5-3
Register
Address Translation and Mapping
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Section 4.3.2.2.4, “Boot ROM
summarizes the general format of these window definitions.
High-order address bits defining location of the window in the initial address space
Window enable, window size
Table 5-3. Format of Window Definitions
Location”) and
The local access window, which describes the range of
1
Function
Section 5.2.4.3.1,
Section 5.2.4.1, “Internal Memory Map
System Configuration
5-3