MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 262

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
Table 5-56
5-54
General Purpose (Global) Timer Module 2:
All registers defined for GTM1 are also defined for GTM2; the base address of GTM2 registers is 0x0_06 nn .
0x05–0x0F
0x01–0x03
Offset
0x1A
0x1C
0x1E
0x2A
0x2C
0x2E
0x3A
0x3C
0x3E
0x00
0x04
0x10
0x12
0x14
0x16
0x18
0x20
0x22
0x24
0x26
0x28
0x30
0x32
0x34
0x36
0x38
shows memory map of the GTM.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Timer 1 and 2 global timers configuration register (GTCFR1)
Reserved
Timer 3 and 4 global timers configuration register (GTCFR2)
Reserved
Timer 1 global timers mode register (GTMDR1)
Timer 2 global timers mode register (GTMDR2)
Timer 1 global timers reference register (GTRFR1)
Timer 2 global timers reference register (GTRFR2)
Timer 1 global timers capture register (GTCPR1)
Timer 2 global timers capture register (GTCPR2)
Timer 1 global timers counter register (GTCNR1)
Timer 2 global timers counter register (GTCNR2)
Timer 3 global timers mode register (GTMDR3)
Timer 4 global timers mode register (GTMDR4)
Timer 3 global timers reference register (GTRFR3)
Timer 4 global timers reference register (GTRFR4)
Timer 3 global timers capture register (GTCPR3)
Timer 4 global timers capture register (GTCPR4)
Timer 3 global timers counter register (GTCNR3)
Timer 4 global timers counter register (GTCNR4)
Timer 1 global timers event register (GTEVR1)
Timer 2 global timers event register (GTEVR2)
Timer 3 global timers event register (GTEVR3)
Timer 4 global timers event register (GTEVR4)
Timer 1 global timers prescale register (GTPSR1)
Timer 2 global timers prescale register (GTPSR2)
Timer 3 global timers prescale register (GTPSR3)
Timer 4 global timers prescale register (GTPSR4)
General Purpose (Global) Timer Module 1—Block Base Address 0x0_0500
Table 5-56. GTM Register Address Map
Register
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
—
R
0xFFFF
0xFFFF
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0003
Freescale Semiconductor
Reset
Value
0x00
0x00
—
—
5.7.5.1/5-55
5.7.5.1/5-55
5.7.5.2/5-58
5.7.5.3/5-59
5.7.5.4/5-59
5.7.5.5/5-60
5.7.5.2/5-58
5.7.5.3/5-59
5.7.5.4/5-59
5.7.5.5/5-60
5.7.5.6/5-60
5.7.5.7/5-61
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