MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 250

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
5.5.6
5.5.6.1
The real time clock (RTC) timer is suitable for time stamping or time and calendar generation. It can
maintain a one-second count which is unique over a period of approximately 136 years. Software can
convert this count into time-of-day or calendar information if required. An alarm function is also provided.
The RTC can be clocked by the internal system bus clock or by an external clock source. The RTC consists
of 32-bit up-counter which is incremented by an one-second count clock derived from the RTC input clock.
The RTC can be programmed to generate a maskable interrupt when the time value matches the value in
its associated alarm register.
The RTC can be initialized by software with an initial count value in the real time counter load register
(RTLDR). It can also be programmed to generate an interrupt every second. The real time counter control
register (RTCTR) is used to enable or disable the various timer functions. The real time counter event
register (RTEVR) is used to report the interrupt source. The RTC counter is reset to zero on hard reset but
is not affected by soft reset. It is initialized by the software. The RTC function can be disabled.
Figure 5-31
5.5.6.2
The RTC unit can operate in the following modes:
5-42
Bus Clock
System
•
Input
RTC
RTC enable/disable mode:
RTCNR[CLEN] enables the RTC timer. It should be set by software after a system reset to enable
the RTC timer.
— RTC disable mode (RTCNR[CLEN] = 0)
— RTC enable mode (RTCNR[CLEN] = 1)
When the RTC’s clock is disabled, counter maintains its old value (default).
RTCNR[CLIN]
Functional Description
shows the functional RTC block diagram.
Real Time Counter Unit
RTC Operational Modes
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Figure 5-31. Real Time Clock Module Functional Block Diagram
RTCNR[CLEN]
Disable
Clock
RTPSR[PRSC]
Prescaler
32-Bit
RTLDR[CLDV]
RTALR[ALRM]
Counter
32-Bit
=
RTCTR[CNTV]
RTCNR[PIM]
RTCNR[AIM]
RTEVR[AIF]
RTEVR[PIF]
Freescale Semiconductor
Interrupt
Second
Interrupt
Alarm