MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 795

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.5.13 MAC Station Address Part 1 Register (MACSTNADDR1)
The MACSTNADDR1 register is written by the user. The value of the station address written into
MACSTNADDR1 and MACSTNADDR2 is byte reversed from how it would appear in the DA field of a
frame in memory. For example, for a station address of 0x12345678ABCD, MACSTNADDR1 is set to
0xCDAB7856 and MACSTNADDR2 is set to 0x34120000.
Figure 15-48
Table 15-52
Freescale Semiconductor
23–31
Bits
22
Offset eTSEC1:0x2_4540; eTSEC2:0x2_5540
Reset
W
R
Excess Defer Excessive transmission defer. This bit latches high and is cleared when read. This bit is cleared by
16–23
24–31
0
Station Address, 6th Octet
8–15
0–7
Bit
Name
describes the fields of the MACSTNADDR1 register.
shows the MACSTNADDR1 register.
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Station Address, 6th Octet
Station Address, 5th Octet
Station Address, 4th Octet
Station Address, 3rd Octet
default.
0 Normal operation.
1 The MAC excessively defers a transmission.
Reserved
Figure 15-48. MAC Station Address Part 1 Register Definition
Name
Table 15-51. IFSTAT Field Descriptions (continued)
Table 15-52. MACSTNADDR1 Field Descriptions
7
8
Station Address, 5th Octet
This field holds the sixth octet of the station address. The sixth
octet (station address bits 40
This field holds the fifth octet of the station address. The fifth octet
(station address bits 32
This field holds the fourth octet of the station address. The fourth
octet (station address bits 24
This field holds the third octet of the station address. The third
octet (station address bits 16
All zeros
15 16
Description
Station Address, 4th Octet
–
39) defaults to a value of 0x0.
Description
–
–
–
47) defaults to a value of 0x0.
31) defaults to a value of 0x0.
23) defaults to a value of 0x0.
Enhanced Three-Speed Ethernet Controllers
23 24
Station Address, 3rd Octet
Access: Read/Write
15-77
31