MPC8313ZQADDC Freescale Semiconductor, MPC8313ZQADDC Datasheet - Page 180

• Manufacturer Part Number: MPC8313ZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO ENC
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313ZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Offset 0x0_0904
Reset, Clocking, and Initialization
The SPMF field maximum allowed value is dependent on the value sampled on CFG_CLKIN_DIV during
power-on reset.
are as follows:
4.3.2.2
RCWHR is shown in
word high loaded during the reset flow.
4-14
Field
Field
PCIHO
ST
16
0
TSEC1M
Reset Configuration Word High Register (RCWHR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
RCWLR Bits
In PCI host mode, the SPMF field described in
csb_clk:SYS_CLK_IN ratio regardless of the CFG_CLKIN_DIV reset
configuration input value during reset flow.
—
Table 4-10
1
4–7
PCIARB
Figure
Figure 4-4. Reset Configuration Word High Register (RCWHR)
18
2
CFG_CLKIN_DIV
defines the upper limit of SPMF with respect to these values. Values for SPMF
Field Name
4-4. This read-only register gets its values according to the reset configuration
SPMF
—
1
0
19
3
Table 4-10. SPMF Maximum Values
TSEC2M
CORE
Table 4-9. System PLL Ratio
DIS
4
0111–1111
(Binary)
Value
0000
0001
0010
0011
0100
0101
0110
LBCM
BMS
0
0
21
5
NOTE
BOOTSEQ SWEN
22
6
DDRCM
csb_clk : CLKIN (PCI Host Mode)
1
1
7
(1+~sampled_cfg_clkin_div))
Reserved, should not be set
Table 4-9
csb_clk : (PCI_CLK x
(PCI Agent Mode)
8
Maximum SPMF
Value (Decimal)
—
Reserved
Reserved
9
2 : 1
3 : 1
4 : 1
5 : 1
6 : 1
6
3
ROMLOC
always selects the
11
27
Freescale Semiconductor
TLE LALE
12
28
RLEXT
Access: Read/Write
13
29
—
14
30
—
—
15
31